1. Field of the Invention
This invention relates to a step-cut insulated gate static induction transistor capable of carrying out high-speed switching, a high-speed and low power step-cut insulated gate static induction transistor integrated circuit, and method of manufacturing the same.
2. Description of the Prior Art
Insulated gate transistors for high frequency amplification and integrated circuits have been heretofore used but have a disadvantage that the drivability is small. For example, a complementary metal-oxide semiconductor transistor integrated circuit (C-MOS) has been known as an application of an insulated gate transistor. However, This circuit (C-MOS) operates at low dissipation power but operates at switching speed, because of small drivability to overcome such disadvantages as noted above, one of the present inventors has previously proposed an insulated gate static induction transistor (for example, see Japanese Patent Application No. 1756/1977) and a step-cut insulated gate static induction transistor (for example, see Japanese Patent Application No. 13,707/1977). The insulated gate static induction transistor is designed so that the depletion layer spread from the drain regions reaches the source region. Thus, a current flowing from source to drain is controlled not only by the gate voltage but also by the drain voltage and the current flows not only into an interface between a semiconductor and an insulator but also into a substrate. Therefore, the insulated gate static induction transistor has monsaturating current-voltage characteristics and has large drivability. Particularly, the step-cut insulated gate static induction transistor has a channel formed depthwise of a semiconductor substrate, thus providing a good controllability for a channel length and a gate length, and the just described transistor is well suited for shortening a channel to improve its drivability. Thus, the step-cut insulated gate static induction transistor is able to increase its drivability and decrease a parasitic capacitance and therefore exhibits an excellent performance as a high speed switching transistor and a high-speed and low power integrated circuit.
Prior art will be described hereinafter with reference to FIG. 1. FIG. 1(a) shows an example of a construction in section of a conventional step-cut insulated gate static induction transistor. In FIG. 1(a), reference number 10 designates a semiconductor substrate, a main surface of which is partly provided with a U-shaped groove A drain region 11, a channel region 13 and a source region 12 are provided in this order depthwise from the main surface along the side wall of the U-shaped groove, and a drain electrode 11' is connected to the drain region 11 A source electrode, which is not shown, is provided vertically as viewed from the paper surface The drain region 11 and the source region 12 have the impurity concentration of the order of 10.sup.18 to 10.sup.21 cm.sup.-3, the conductivity type of which is shown as a P type, but an N type can be used. In addition, the region 11 can be used as a source region and the region 12 can used as a drain region The channel region 13 has the impurity concentration of the order of 10.sup.12 to 10.sup.16 cm.sup.-3, the conductivity type of which can be of the same as or opposite to that of the drain region 11 and the source region 12, and a multi-layered construction can be also employed. The impurity concentration as well as the depth of the aforesaid U-shaped groove are determined so that a depletion layer spread from the drain region 11 reaches the source region 12 in at least a part of the operating condition thereof. A gate insulator 14 such as an oxide film is provided in contact with the channel region 13 and has a thickness of the order of 100 to 1,000 .ANG.. On the side opposite the gate insulator 14 is provided a gate electrode 14' formed of metal, polycrystalline silicon or the like. Reference number 15 designates a field oxide film. Since a conventional step-cut insulated gate static conduction transistor as shown in FIG. 1(a) is formed depthwise with respect to a semiconductor substrate. dimensions of a transistor can be controlled with precision for deposition and etching, thereby providing a good means for controlling the channel length and gate length and being well suited for shortening the channel to thereby improve drivability Accordingly, such a transistor, as noted above, has a large drivability and can decrease a parasitic capacitance and therefore exhibits an excellent performance as a high speed switching transistor and a high speed low power integrated circuit.
One example of a well known fabrication process for manufacturing the aforesaid step-cut insulated gate static conduction transistor will be described with reference to FIG. 2.